Product
English > SVI-09
Image Recorder
SVI-09■ Overview
Various inputs and outputs, such as LVDS, are supported by using 100pin connector directly connected to the FPGA.
With I2C communication support, it is easy to control camera and SerDes. Our application enables displaying histograms, vector scopes and more in Vendor mode, so it is possible to analyze videos in real-time.
This board can be connected to two CMOS sensors, allowing you to build an ideal environment for stereo camera development.
In addition, it can use FPGA plug-in functions for custom development.
■ Characteristics
• Input / output with 2 ports of parallel 60 pins and 100 pins
• Input / output with USB3.0 (Vendor Class)
• FPGA plug-in functions for custom development 
• Input / output with USB3.0 (Vendor Class)
• FPGA plug-in functions for custom development
■Specification
| Table Item | Specification | Remarks | |
|---|---|---|---|
| Video input interface | Parallel video signal | Supports FPD-Link III, GMSL, GVIF2 as deserializer | |
| Video output interface | USB3.0 (Windows, Linux, UVC Driver) USB3.0 Vendor Driver (Windows) |
Special HDMI monitors are available individually | |
| Input resolution | Up to 8190x4095 pixel | In the case of 1920x1080, about 60 fps In the case of 1280x720, about 120 fps |
|
| Output bit rate | within 3.0 Gbps | In the case of 1920x1080 (UVC mode) about 80 fps In the case of 1920x1080 (HDMI mode) about 60 fps |
|
| Supported sync signal | Vsync, Hsync, Pixel Clock | Supports Embedded Sync (BT.656), Data Enable |
|
| Clock rate | ～ 150 MHz | ー | |
| Supported pixel formats | YUV422 (8 bit, 16 bit) / RGB24 / Raw8, 10, 12 |
ー | |
| Input bit width | 8 / 16 / 24 / 32 bit | Use GPIO pins for 24 and 32 bit | |
| Other interfaces | I2C | Frequency : 100 / 200 / 400 kHz | Voltage level follows VDDL |
| GPIO | Up to 16 bit, IN / OUT direction control every 8 bits | Voltage level follows VDDL | |
| Power supply | Board power (input) | USB bus power / Dedicated 2pin connector (5V) |
ー |
| Target side power (output) | VDDL & VDDH = 1.56 ～ 4.2 V VDDP = 1.5 ～ 4.1 or 5.0 V |
VDDL : IO power supply setting VDDH : Power supply for connection board VDDP : Auxiliary power supply for target device |
|
| Other functions | Test pattern output function Image clipping function FPGA plug-in function |
ROM startup : Function to automatically transmit SerDes setting file (I2C) | |
| Interface connector | 50 + 10 pin (A1-50PA-2.54DSA) 100 pin (LSHM-150-03.0-F-DV-A-N-K-TR) |
10 pin is added for 24 bit or 32 bit input Parallel 2ch / LAN / MIPI Interface can be supported individually with an expansion board using a 100 pin connector |
|
| FPGA | Artix-7 (XC7A35T) | ー | |
| Frame memory | 256 MByte (DDR3-SDRAM) | ー | |
| USB3.0 chip | Cypress EZ-USB FX3 | ー | |
| Dimensions | length x width x height = 101.6 x 101.6 x 25.7 (mm) |
Including spacer (10mm) in height | |
| Attached software Windows |
Video display software | NVCap, SVImon | ー |
| I2C control software | SVMCtl, SVICtl | Including SV board update application | |
| Supported SerDes boards of our company | DS90UB914A, DS90UB934, MAX9272, MAX96706 etc., | ー | |
Application software：NVCap & SVMCtl, Test pattern output function, Image clipping function
■ Design Documents
■ Full Package Download
■ Application
Display video signal of camera modules or CMOS sensors to DisplayPort monitor,
Around view development, Simultaneous monitoring of multiple sensors.
Around view development, Simultaneous monitoring of multiple sensors.
■ Application Areas
Automotive / transportation equipment, medical testing / analysis / measurement, IT / information / communications, software, education / research institutions, and so on.
Notes: Product names and company names are trademarks of each companies.
These data may be changed without a preliminary announcement for specification change.